1. Field of the Invention
This invention relates to electronic circuits, and more particularly, to latch circuits.
2. Description of the Related Art
Many integrated circuits (ICs) include a large number of storage circuits. Latches are one type of storage circuit that may be implemented on an IC. A latch circuit may store a bit of data depending based on received input data. The storing of data by a latch circuit may be performed in accordance with a clock signal. Whereas some types of storage circuits are triggered according to an edge of a clock signal (e.g., flip-flops), latch circuits may be sensitive to the level of the clock signals (i.e. high or low).
In some ICs, latch circuits may be implemented as scannable elements, thereby including extra circuitry to support scan testing. To conduct a scan test, test stimulus data may be input into an IC through a serially coupled chain of scannable elements. Each scannable element may include a data input, a scan data input, a data output, and a scan data output. The scan data output of all but the last scannable element may be coupled to the scan data input of a next scannable element. Test stimulus data may be shifted into each scannable element through its scan data input, and applied to logic circuitry (e.g., combinational logic) via its data output. Subsequent to applying the test stimulus data, test result data may be on the data input of each scannable element. Subsequent to capture, the test result data may be shifted through the scan chain via the scan data input and scan data output of each scan chain.
When operating in a normal mode (i.e. when not conducting scan testing), data may be applied to the data input of each scannable element, while data may be conveyed from the data output of each scannable element. During normal mode operations, the data received by a scannable element may cause a change of state to its scan data output. However, since the scan data output of each scannable element is coupled to the scan data input of another scannable element (save for the last scannable element in the chain), such changes may occur without affecting the states of data on the (normal) data inputs and outputs.